1. Field of the Invention
The present invention relates generally to the field of semiconductor devices, and more particularly to a method of fabricating a semiconductor device with fin-shaped structures.
2. Description of the Prior Art
As semiconductor devices' switching speeds continue to increase and operating voltage levels continue to decrease, the performances of metal-oxide-semiconductor filed effect transistors (MOSFETs) and other types of transistors, such as bipolar junction transistors, need to be correspondingly improved. Currently, along with the development of the MOSFETs, one of the main goals in the industry is to increase the carrier mobility so as to further increase the operation speed of the MOSFETs.
Accordingly, crystal strain technology has been developed recently and is becoming more and more attractive as a means for getting better performances in the field of MOS transistor fabrication. Specifically, the mobility of charge carriers, such as electrons or holes, in a MOS transistor can be increased when the certain amount of tensile stress or compressive stress is applied to the channel region of the MOS transistor. Currently, attempts have been made to use a strained silicon layer as a part of MOS transistors in which an epitaxial silicon germanium (SiGe) structure or an epitaxial silicon carbide (SiC) structure is formed. In this type of MOS transistor, a biaxial tensile strain is induced in the epitaxy silicon layer due to the difference in lattice constants between SiGe or SiC and Si. As a result, the band structure is altered, and the carrier mobility is increased.
However, due to the continuous shrinkage in the size of the semiconductor devices, the devices merely adopting the strain-silicon structure are no longer suitable for the semiconductor industry. For example, for a semiconductor device with more than one transistor with different conductive types, it is important about how to effectively adjust electrical properties of carrier channels in the transistors, such as threshold voltage (VTH), and to incorporate the strained-silicon technology concurrently.